Name: 7476 IC Dual Master-Slave J-K Flip-Flops
SKU: 90
Availability: InStock

7476 IC Dual Master-Slave J-K Flip-Flops

EGP17.00

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PIN LAYOUT

FEATURES

Two J-K Master-Slave Flip-Flops with Preset and Clear Inputs

Outputs Directly Interface to CMOS, NMOS and TTL

Large Operating Voltage Range

Wide Operating Conditions

Not Recommended for New Designs Use 74LS76

PIN DESCRIPTION

DIMENSIONAL DRAWING

TECHNICAL DATA

Absolute Maximum Ratings

Supply Voltage	7V
Input Voltage	5.5V
Operating Free Air Temperature	0°C to +70°C
Storage Temperature Range	-65°C to +150°C

Recommended Operating Conditions

SYMBOL	PARAMETER	MIN	TYP	MAX	UNITS
Vcc	Supply Votage	4.75	5	5.25	V
Vih	HIGH Level Input Voltage	2			V
Vil	LOW Level Input Voltage			0.8	V
Ioh	HIGH Level Output Current			-0.4	mA
Iol	LOW Level Output Current			16	mA
Ta	Free Air Operating Temperature	0		70	°C

Electrical Characteristics

SYMBOL	PARAMETER	CONDITIONS	MIN	TYP	MAX	UNITS
Vi	Input Clamp Voltage	Vcc=Min,Ii=-12mA			-1.5	V
Voh	HIGH Level Output Voltage	Vcc=Min,Ioh=MAX,Vil=MAX	2.4	3.4		V
Vol	LOW Level Output Voltage	Vcc=Min,Iol=MAX,Vih=MAX		0.2	0.4	V
Ii	Input Current@MAX Input Voltage	Vcc=Max,Vi=5.5V			1	mA
Iih	HIGH Level Input Current	Vcc=Max,Vi=2.4V			40	µA
Iil	LOW Level Input Current	Vcc=Max,Vi=0.4V			-1.6	mA
Ios	Short Circuit Output Current	Vcc=Max	-18		-55	mA
Icch	Supply Current with Outputs HIGH	Vcc=Max		4	8	mA
Iccl	Supply Current with Outputs LOW	Vcc=Max		12	22	mA